Jobs at K2 Space Corporation

Design and integrate photonic integrated circuits, high-speed modulators, optical I/O, RF interfaces, and rugged space-qualified packages. Lead PIC layout, simulation, tapeout, packaging, bias control, characterization, and radiation, thermal-vacuum, and vibration qualification. Collaborate with systems, RF, ASIC, manufacturing, test, automation, foundry, and packaging teams to develop photonic hardware for satellites and deep-space missions.

Own photonic integrated-circuit design automation, inverse-design and AI-guided optimization, parametric layouts, simulation, DRC/LVS verification, and fabrication-aware modeling. Design and characterize photonic device blocks through tapeout, maintain component libraries and compact models, and connect design tools with automated testing and calibration systems. Develop behavioral and physical models for photonic circuits, links, lasers, and gain media while supporting system co-design, documentation, reviews, and team mentoring.

Design and develop high-performance RF and millimeter-wave MMICs for satellite communications, including power amplifiers, low-noise amplifiers, and RF switches. Own designs from architecture through layout, electromagnetic simulation, tapeout, characterization, and system integration. Optimize performance across power, efficiency, linearity, noise, bandwidth, and robustness while collaborating with RF systems, antenna, packaging, and transceiver teams.

Design and lead advanced ASIC package architectures, especially FC-BGA and MCM solutions, from early trade studies through production. Responsibilities include substrate stack-ups, ball maps, SI/PI, thermal management, signal breakout, material selection, qualification, and assembly optimization. The engineer partners with silicon, RF, and systems teams and manages OSAT and substrate-vendor relationships for high-performance, power-dense mixed-signal and digital SoCs.

Lead end-to-end ASIC package architecture and execution for high-performance FC-BGA and MCM solutions. Define substrate stack-ups, ball maps, SI/PI strategies, thermal architecture, materials, and assembly processes. Partner with silicon, RF, and systems teams to optimize package interfaces, manage OSAT and substrate vendors, establish design standards, and drive qualification through production ramp for high-pin-count, power-dense ASICs.

Lead the architecture, circuit design, integration, verification, tapeout, and silicon validation of high-speed ADCs, DACs, and analog front-ends for advanced mixed-signal SoCs. Drive architecture trade studies, calibration techniques, FinFET CMOS implementation, converter integration, simulation methodologies, and collaboration with RF, digital, systems, package, and verification teams. Provide technical leadership and mentorship to analog and mixed-signal engineers.

Build and extend ground software used to build, test, and operate K2 satellites and customer payloads. Collaborate with Mission Operations and Flight Software to design mission architecture; implement backend and frontend features (Rust, TypeScript/Vue); support on-call operations; mentor engineers and participate in design and code reviews to scale mission automation and constellation operations.

Design and implement low-level, real-time embedded software in Rust/C/C++ for satellite subsystems (propulsion, attitude, power). Lead hardware bring-up, debug complex HW/FW issues with JTAG/SWD and scopes, scale software across products, and mentor engineers to ensure fault-tolerant, flight-ready systems.

Define and execute verification plans for block-to-full-chip, build SystemVerilog/UVM testbenches, write assertions, run constrained-random and directed tests, manage regressions and CI, perform coverage closure and debug, support silicon bring-up and post-silicon validation, and collaborate across architecture, RTL, DFT, firmware, and physical design teams.

Lead full physical design flow for complex SoC blocks and top-level integration—from synthesis through GDSII—achieving timing closure, PPA optimization, sign-off (DRC/LVS, IR/EM, power), automation and scripting, vendor coordination, ECO/tapeout support, and production/spaceflight support for mixed-signal, space-qualified SoCs.

Lead development and execution of verification plans for block-to-full-chip ASICs. Build SystemVerilog/UVM testbenches, write SVAs, integrate formal methods, run constrained-random and directed tests, manage regressions and CI, perform failure triage and root-cause analysis, ensure coverage closure, support silicon bring-up and post-silicon validation, and drive DV methodology and cross-functional verification efforts.

Design and implement real-time, fault-tolerant flight software for high-power spacecraft. Develop control applications for propulsion, guidance/attitude, power, and communications. Create state machines, verification tools, and infrastructure for deployment and testing. Perform data analysis, anomaly investigation, and support subsystem integration and hardware-in-the-loop validation.

Design and build mission‑critical full‑lifecycle applications connecting engineering, manufacturing, and operations. Lead architecture, deployment, and quality processes; develop prototypes to production, drive data‑led prioritization, mentor staff, and collaborate across teams to scale satellite design, production, and mission operations.

Lead end-to-end RTL-to-GDSII physical implementation for high-performance SoCs for satellites. Drive timing closure, PPA optimization, tool/flow decisions, manage external PD partners, collaborate with packaging, DFT, and post-silicon teams, and support production and spaceflight tapeouts in advanced FinFET nodes.

Design, implement, verify, and maintain FPGA firmware (VHDL/SystemVerilog) for spacecraft subsystems (propulsion, attitude, RF, power). Own architecture, validate via simulation, bench and Hardware-In-The-Loop testing, support integration/troubleshooting, and build tools/infrastructure for reliable, high-reliability FPGA solutions.

Lead FPGA prototyping and silicon bring-up for next-generation communications ASICs. Develop FPGA platforms, support first-silicon debug and validation, build automated test infrastructure, validate high-speed digital interfaces, create traffic generators and protocol checkers, and collaborate with ASIC, firmware, software, systems, and DFT teams to accelerate product development.

Design, implement, and verify flight software for high-power satellites using Rust or C/C++. Build real-time, fault-tolerant control systems, drivers for microcontrollers and sensors, state machines, CI/CD tooling, and test infrastructure including hardware-in-the-loop. Support integration, testing, anomaly investigation, and on-orbit operations.

Build and maintain ground software used to build, test, and operate K2 satellites and customer payloads. Develop backend and frontend features (Rust, TypeScript/Vue), implement mission automation, collaborate with Mission Operations and Flight Software, support on-call operations, and mentor engineers.

Design and develop high-performance RF and millimeter-wave MMICs, including power amplifiers, low-noise amplifiers, and RF switches, from architecture through tapeout, characterization, and product integration. Perform circuit and electromagnetic simulations, optimize performance, develop test plans, validate hardware, correlate measurements with simulations, and collaborate with systems, antenna, packaging, and transceiver teams on satellite communication products.

Designs advanced ASIC packages, including FC-BGA and MCM architectures, from early trade studies through production. Responsibilities include substrate and ball-map definition, SI/PI and thermal design, high-speed signal breakout, material and assembly selection, vendor management, qualification, and collaboration with silicon, RF, and systems teams. The role focuses on high-pin-count, power-dense mixed-signal and digital SoC packages for high-reliability aerospace applications.