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HRL Laboratories

Senior Analog ASIC Systems Design Engineer

Job Posted 16 Days Ago Posted 16 Days Ago
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Hybrid
Malibu, CA
146K-187K Annually
Senior level
Hybrid
Malibu, CA
146K-187K Annually
Senior level
Lead systems engineering activities for R&D projects, requiring 30% systems engineering and 70% design experience in ASIC and FPGA. Collaborate with scientists to develop and validate requirements for complex technologies.
The summary above was generated by AI
General Description:
We are seeking an experienced Systems Engineer with deep design expertise in ASICs (analog and digital), FPGAs, and firmware to lead advanced R&D programs from concept through technology demonstration. This role blends systems-level thinking with hands-on design and implementation and is ideal for engineers with experience in low-TRL, high-innovation environments.
The successful candidate will have completed multiple full product lifecycles—from concept and architecture through manufacturing and validation—and bring a skill mix of ~70% design/implementation and ~30% systems engineering. The position involves close collaboration with physicists, mathematicians, and domain scientists to transform emerging concepts into actionable system architectures and requirements. Candidates must be comfortable operating in ambiguity, developing new architectures iteratively, and driving early-stage technology toward real-world application.

Essential Duties:
Lead the definition, design, and maturation of advanced research systems through a model-based systems engineering (MBSE) framework.
Collaborate with researchers to translate experimental goals into operational, functional, and environmental system requirements.
Execute architecture development, performance trade studies, and requirements definition for mixed-signal ASIC, FPGA, and firmware-based systems.
Integrate component-level designs into broader system concepts, ensuring manufacturability, interface compatibility, and testability.
Lead and contribute to technical design reviews (e.g., PDRs, CDRs) and experimental validation of prototypes.
Work with design teams to ensure validation strategies and system architectures support requirements across analog and digital domains.
Use MBSE tools (e.g., Cameo, MagicDraw, SysML) to define architectures, model behavior, and analyze performance budgets.
Develop interconnect diagrams, interface definitions, and functional block diagrams for complex electronics systems.
Contribute to failure analysis, debug efforts, and iterative refinement of hardware and firmware designs.
Identify and implement improvements to tools, processes, and methodologies supporting early-stage development.

Required Skills:
7+ years of hands-on design and implementation experience in ASIC (analog/digital), FPGA, and embedded firmware.
Demonstrated expertise in mixed-signal design, verification, and lifecycle execution from concept through tape-out and validation.
Minimum 2 years of experience in systems engineering, modeling, simulation, or architecture definition.
Experience leading technical trade studies and system-level architecture development.
Strong understanding of signal integrity, power distribution, and control/data flows in precision systems.
Experience working with cross-functional teams in agile, model-based environments.
Effective communicator, able to collaborate with both technical and non-technical stakeholders.
Proven ability to debug, troubleshoot, and resolve complex system and integration issues.
Experience leading system integration and validation across ASICs, FPGAs, PCBs, and software platforms.

Required Education:
Bachelor’s, Master’s, or Doctorate in Electrical Engineering, Computer Engineering, Physics, or related technical field from an accredited institution.

Special Requirements:
U.S. Citizenship required. Must hold or be eligible for a Tier 5 (T5) security clearance (formerly SSBI). Participation in a Continuous Evaluation program may be required.

Compensation:
The base salary range for this full-time position is $145,745 - $186,688 + bonus + benefits.
Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range during the hiring process. Please note that the compensation details listed reflect the base salary only, and do not include potential bonus or benefits.

We are proud to be an EEO/AA employer M/F/D/V. We maintain a drug-free workplace and perform pre-employment substance abuse testing. 

Top Skills

Asic
Cameo
Enterprise Architecture
Firmware
Fpga
Magicdraw
Model Based Engineering
Sysml
Uml

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