HRL Laboratories
Sr. Integration and Packaging Engineer
Job Posted 15 Days Ago
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The Sr. Integration and Packaging Engineer will lead development and qualification of integration and packaging processes, troubleshoot issues, and interface with vendors.
General Description:
The Sr. Integration and Packaging Engineer will drive the development and qualification of new integration and packaging processes. As part of an R&D and product development team, the Sr. Integration and Packaging Engineer will help identify and develop innovative solutions to process challenges in a team-based and fast-paced environment. Ideally, the candidate has previous leadership experience and can support project management activities. Strong background in problem solving and troubleshooting is desired.
Essential Duties:
Planning and executing experiments for development of new packaging and integration processes and materials.
Identifying and troubleshooting process issues by employing various metrology tools and characterization techniques.
Maintaining and improving established processes and troubleshooting technical issues.
Conducting electrical and mechanical characterization of materials and structures.
Employing various metrology tools and techniques and reliability tests to understand and improve the performance of joining processes.
FMEA and root cause analysis.
Interfacing with vendors of equipment and process materials if needed.
Lead engineering development schedules, planning and coordination of ongoing efforts.
Compiling and analyzing data, writing reports, and presenting results to team members and management.
Report to the project lead on regular basis on progress and issues, support communication material such as charts and slides.
Required Skills:
Experience with semiconductor packaging technologies (bumping, flip chip bonding, underfill)
Experience and familiarity with semiconductor & MEMS processes such as lithography/exposure tools, thin film deposition (PVD, CVD, ALD), wet etch, dry etch, and plasma tools. Familiarity with electroplating processes.
In-depth knowledge of MEMS and semiconductor device microfabrication and material properties.
Strong foundation of materials science principles.
Experience with CAD tools for device mask layout.
Experience with metrology tools including profilometry, surface and bulk analytical methods relevant to characterization of thin films (e.g. XPS, XRD, SEM, EDX).
Strong statistical analysis and data mining capabilities with tools like JMP and Excel.
Experience with six sigma methodologies (FMEA, SPC, DOE).
Strong and independent problem-solving skills. Experience with diagnosing issues using failure analysis techniques and recommending solutions.
Excellent written and verbal communication skills and ability to work as a team player in a fast-paced environment. Good presentation skills.
Excellent time management skills. Ability to deal with multiple issues and changing priorities.
Self-motivated, attention to detail, ability to prepare technical reports by collecting, analyzing, and summarizing information, as well as write technical specifications.
Experience in leading teams and program management is a plus.
Experience with modeling and design of MEMS devices (Finite Element Analysis using ANSYS/COMSOL, MATLAB, and SOLIDWORKS) is a plus.
Experience in using electronic test equipment including signal generators and data acquisition systems in conjunction with MEMS devices is a plus.
Required Education:
M.S. or Ph.D. in Material Science, Electrical Engineering, Mechanical Engineering, Chemistry or related field.
Minimum 5-7 years of hands-on experience with semiconductor packaging (joining and reflow processes) and microfabrication (lithography, etching, plating, thin film deposition, characterization).
Past leadership and program management experience.
Special Requirements:
US Citizenship
Requires clearance or clearable TS/SCI preferred
Compensation:
The base salary range for this full-time position is $145,745 - $186,688 + bonus + benefits.
Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range during the hiring process. Please note that the compensation details listed reflect the base salary only, and do not include potential bonus or benefits.
We are proud to be an EEO/AA employer M/F/D/V. We maintain a drug-free workplace and perform pre-employment substance abuse testing.
Top Skills
Ansys
Comsol
Excel
Jmp
Lithography
Matlab
Mems Processes
Metrology Tools
Semiconductor Packaging Technologies
Solidworks
Thin Film Deposition
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