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Semtech

Sr Staff NPI Product Engineer

Posted 6 Days Ago
Be an Early Applicant
In-Office
Ottawa, ON
94K-122K Annually
Senior level
In-Office
Ottawa, ON
94K-122K Annually
Senior level
Support new product development activities and collaborate with cross-functional teams, focusing on design for testability and manufacturability in semiconductor products.
The summary above was generated by AI

Location: Burlington, ON. (Hybrid – 4 days in office)

Our Team

Semtech's New Product Introduction (NPI) Product Engineering Team is the central engineering function behind every new product we bring to market. Our team of focused and talented engineers takes full ownership of new product development — driving each program from conception through end-of-life with a commitment to flawless execution. Working closely with all internal cross-functional teams, our engineers define and drive DfT testability requirements, test coverage, production characterization (across process, voltage, and temperature variations), ATE-to-bench correlation, cost and yield optimization, test time reduction, project logistics, and seamless transfer to full-volume manufacturing.  We take pride in delivering high-quality products that exceed customer expectations and drive business success — and our versatile, results-driven team makes it happen.

Job Summary

We are looking for a NPI Product Engineer to join our team. This role supports new product development activities — from early-stage development through production transfer — working closely with senior engineers and cross-functional teams to build foundational skills and contribute to program success. This is an excellent opportunity for a motivated engineer eager to develop deep technical expertise in high-performance optical, analog/mixed-signal semiconductor IC products in cutting-edge CMOS and BiCMOS technologies. Reporting to the Manager of NPI Product Engineering, the Junior NPI Product Engineer will support NPI activities across the full product development cycle under the guidance of senior engineers.

Responsibilities

1. NPI Program Support & Cross-Functional Collaboration (25%)

  • Support NPI activities from product concept through final product release, assisting in ensuring product conformance to specifications and seamless transfer to full-volume manufacturing

  • Collaborate with internal cross-functional teams including Project Lead, Design, Marketing, Validation, Test Engineering, Characterization, Quality & Reliability, Applications Engineering and Operations under the direction of senior engineers

  • Assist in tracking backend NPI development through product transfer, and participate in milestone reviews of NPI program logistics, timelines and milestones

  • Support preparation of NPI product release deliverables and OSAT-related manufacturing documentation, ensuring accuracy and completeness

  • Receive technical mentorship from senior engineers and actively develop technical skills and product knowledge

2. Design for Testability/Manufacturability (35%)

  • Support the definition of Design for Testability (DfT) and Design for Manufacturability (DfM) requirements for NPI products under the guidance of senior engineers

  • Assist test engineers in the development, implementation, verification and optimization of ATE test programs, learning how testability and manufacturability features are implemented and evaluated

  • Support product characterization, correlation, and release activities, contributing to execution and adherence to product specifications and quality standards

  • Assist in finalizing datasheet specifications and ATE production test limits under senior engineer direction, gaining exposure to data-driven, statistically validated limit-setting processes

3. Characterization, Data Analysis & Yield Optimization (30%)

  • Assist in developing product characterization plans for wafer-level and bench characterization tests, building understanding of test coverage requirements across product specifications and operating conditions

  • Perform data analysis of ATE and bench characterization results across PVT variations, including ATE-to-bench correlation studies and process capability analysis, with guidance from senior engineers

  • Support yield modeling activities to develop foundational understanding of yield and quality drivers

  • Assist in planning and executing Design of Experiments (DOE) to support yield analysis, test time reduction, and test optimization efforts

  • Support product validation and reliability qualification activities in collaboration with Test, Characterization, Validation and Reliability Engineering teams

  • Assist in identifying yield loss Pareto opportunities and contribute to implementing targeted solutions under senior engineer direction

4. Manufacturing Quality, Failure Analysis & Continuous Improvement (10%)

  • Assist in monitoring yields and quality metrics across processing steps, learning to identify trends and anomalies

  • Support review of test coverage, test limits, and guard banding under the guidance of senior engineers

  • Assist in failure analysis and root cause investigation activities for field returns and RMA cases, contributing to corrective and preventive action (CAPA) development

  • Support collaboration with foundry process and packaging engineering teams in resolving issues during wafer fabrication, packaging, die sort, and final package test

  • Contribute to product life cycle monitoring activities, learning to identify opportunities for cost reduction and continuous improvement

Minimum Qualifications

  • BS in Electrical Engineering or a related field (MS a plus)

  • 5-8 years of experience in semiconductor product engineering, test engineering, or design engineering; internship or co-op experience in relevant fields considered

  • Basic familiarity with statistical theory and data analysis tools (e.g. Excel, JMP) for data interpretation and reporting

  • Foundational knowledge of semiconductor physics and analog/mixed-signal IC design principles

  • Exposure to or coursework in DFM, DFT, and ATE test methodologies is a plus

  • Familiarity with high-speed digital ATE test platforms (e.g. Advantest, Teradyne) or bench test equipment is a plus

  • Basic awareness of semiconductor qualification processes and reliability testing methodologies (JEDEC, HTOL, ESD, Latch-up) is a plus

  • Strong analytical, problem-solving, and communication skills with a eagerness to learn in a fast-paced engineering environment

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description.

All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.

We may leverage Artificial Intelligence (AI) tools to enhance efficiency during candidate screening, assessment, and recruitment. Final hiring decisions remain with our Hiring Teams, not AI systems.

A reasonable estimate of the pay range for this position is $94,000 - $122,000.  There are several factors taken into consideration in determining base salary, including but not limited to: job-related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package.

Top Skills

Analog/Mixed-Signal Ic Design Principles
Ate Test Methodologies
Dfm
Dft
Digital Ate Test Platforms
Esd
Excel
Htol
Jedec
Jmp
Latch-Up
Semiconductor Physics

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