Tenstorrent Inc. Logo

Tenstorrent Inc.

Staff Analog Design Engineer

Posted 16 Days Ago
Be an Early Applicant
Easy Apply
Remote
Hiring Remotely in United States
100K-500K Annually
Expert/Leader
Easy Apply
Remote
Hiring Remotely in United States
100K-500K Annually
Expert/Leader
Design and deliver die-to-die chiplet PHY IP (including PLLs) across the full lifecycle: architecture, circuit design, verification, layout engagement, tape-out, and silicon bring-up. Collaborate cross-functionally to integrate and optimize AMS IP in advanced FinFET nodes, focusing on high-speed I/O, power, performance, and production quality.
The summary above was generated by AI

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Tenstorrent is seeking a Staff Analog/Mixed Signal Design Engineer to join our Analog Design team. In this role, you’ll develop differentiated die-to-die chiplet PHY IP solutions including PLL’s.

This role is remote role open to any location in the U.S.

We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.


Who you are

  • A Staff Analog/Mixed-Signal Design Engineer to develop die-to-die chiplet PHY IP, including PLLs and key analog/mixed-signal blocks in deep sub-micron FinFET technologies.
  • A hands-on owner for the full lifecycle: design, verification, layout interaction, tape-out, and silicon bring-up to production quality.
  • A strong cross-functional partner who can work with architecture, analog, digital, verification, layout, and software teams to integrate and optimize AMS IP.

What we need

  • BSEE/MSEE/PhD with 10 years of relevant analog/mixed-signal IC design experience, including PLL and AMS design in FinFET processes.
  • Proficient with industry-standard EDA tools and comfortable working closely with layout, with a solid grasp of layout-driven constraints and impacts.
  • Experienced with circuit/SoC tape-outs that reached production, and confident in silicon bring-up and testing.
  • A collaborative, data-driven engineer—able to clearly analyze, document, and present results, with a self-motivated, energetic approach to building and improving AMS IP.
  • Background in high-speed datacomm/SerDes and die-to-die PHY design.
  • Experience with circuits such as bias generators, amplifiers, LDOs, switched-cap circuits, oscillators, ADCs, DACs, Tx/Rx sub-circuits, and DDR/PCIe/USB PHY components.
  • Familiarity with high-speed digital (serializer/deserializer, dividers) and Tx/Rx equalization (de-emphasis, CTLE, DFE).

What you will learn

  • How to push the limits of die-to-die chiplet PHY IP in advanced FinFET nodes, from architecture through high-volume production.
  • How to co-optimize analog, digital, and layout to hit aggressive performance, power, and area targets in complex SoCs.
  • Deeper expertise in high-speed I/O and PHY architectures, plus practical methodologies for scalable, reusable AMS IP across multiple products.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country. 

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology.  Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).   These requirements apply to persons located in the U.S. and all countries outside the U.S.  As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.  If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Top Skills

Finfet,Pll,Die-To-Die Chiplet Phy,Eda Tools,Serdes,Serializer/Deserializer,Dividers,De-Emphasis,Ctle,Dfe,Bias Generators,Amplifiers,Ldos,Switched-Cap Circuits,Oscillators,Adc,Dac,Tx/Rx Sub-Circuits,Ddr,Pcie,Usb,Silicon Bring-Up,Tape-Out,Layout

Similar Jobs

An Hour Ago
Easy Apply
In-Office or Remote
New York, NY, USA
Easy Apply
Senior level
Senior level
Consumer Web • Healthtech • Professional Services • Social Impact • Software
The Director of Engineering will lead development efforts focused on creating a mental healthcare system, managing teams, and driving technological innovations.
An Hour Ago
Remote or Hybrid
San Francisco, CA, USA
200K-250K Annually
Senior level
200K-250K Annually
Senior level
Artificial Intelligence • Fintech • Payments • Business Intelligence • Financial Services • Generative AI
As Manager, Operations Strategy, you will lead high-impact projects and improve operational efficiency while managing stakeholder alignment across various functions.
Top Skills: ExcelSQL
An Hour Ago
Remote or Hybrid
San Francisco, CA, USA
Junior
Junior
Artificial Intelligence • Fintech • Payments • Business Intelligence • Financial Services • Generative AI
The Senior Associate, Operations Strategy will lead high-impact projects to improve operational efficiency and support data-driven decision-making across teams, focusing on onboarding, payments, and compliance.
Top Skills: Bi ToolsExcelSQL

What you need to know about the Seattle Tech Scene

Home to tech titans like Microsoft and Amazon, Seattle punches far above its weight in innovation. But its surrounding mountains, sprinkled with world-famous hiking trails and climbing routes, make the city a destination for outdoorsy types as well. Established as a logging town before shifting to shipbuilding and logistics, the Emerald City is now known for its contributions to aerospace, software, biotech and cloud computing. And its status as a thriving tech ecosystem is attracting out-of-town companies looking to establish new tech and engineering hubs.

Key Facts About Seattle Tech

  • Number of Tech Workers: 287,000; 13% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Amazon, Microsoft, Meta, Google
  • Key Industries: Artificial intelligence, cloud computing, software, biotechnology, game development
  • Funding Landscape: $3.1 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Madrona, Fuse, Tola, Maveron
  • Research Centers and Universities: University of Washington, Seattle University, Seattle Pacific University, Allen Institute for Brain Science, Bill & Melinda Gates Foundation, Seattle Children’s Research Institute

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account