The Sr. FPGA Design Engineer will design and simulate FPGA/Modem systems, utilizing VHDL and SystemVerilog with high-speed Serdes and various communication interfaces.
Title: Sr. FPGA Design Engineer
Location: Redmond
Term: Contract (possible Perm)
Duration: Long-Term (6+-24 months)
Start Date: ASAP
Requirements
- 10+ Years experience:
- FPGA/Modem Design
- Ultrascale+ & Versal
- VHDL & SystemVerilog
- Design and Simulate
- High-speed Serdes
- Solid scripting (python, pearl, bash, tcl, …)
- Solid Communication interfaces such as: Ethernet, Interlocken, PCIe, SPI, I2C, UART,etc
Nice to Have:
- Active Government Clearance
- Software Defined Radio/Modem Design background
- Some Petalinux Background
- Background in RF design
- Encryption experience
Benefits
- A2e Does NOT Accept Unsolicited Resumes or Referrals from any source other than the candidate, and, as a result, we will not be considering any unsolicited referrals or resumes sent to us as a fee -based candidate submittal.
- Any unsolicited resumes sent to A2e, including unsolicited resumes sent to a A2e mailing address, fax machine or email address, directly to A2e employees, or to A2e’s resume database will be considered A2e property.
- A2e will NOT pay a fee for any placement resulting from the receipt of an unsolicited resume.
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