Top Principal Engineer Jobs in Seattle, WA

Designs and develops large-scale distributed software services for identity governance and provisioning across cloud and hybrid environments. Responsibilities include system design, modular and secure architecture, coding, code reviews, integration testing, monitoring, reliability improvements, and customer-focused collaboration. The role also promotes AI adoption throughout the software development lifecycle and operations.

Design scalable readout circuitry for topological qubits across component, subsystem, and system levels. Collaborate with multidisciplinary teams to codesign readout systems with qubit and control designs, analyze and present simulation results, develop engineering tools and processes, and support quantum hardware research while following safety and compliance standards.

Designs and maintains large-scale AI research platforms supporting GPU clusters, optimizing uptime, performance, and workloads. Develops end-to-end systems, libraries, tools, and agentic workflows that accelerate research. Shapes infrastructure strategy and roadmap, evaluates emerging technologies, and provides technical leadership and mentorship. Collaborates with service engineers, product managers, researchers, and scientists to deliver production platforms, distributed computing systems, and high-performance AI infrastructure.

Lead platform power and performance strategy for next-generation AI compute platforms. Drive silicon/platform architecture, workload characterization, profiling, benchmarking, and cross-functional optimization across silicon, firmware, OS, thermal, and datacenter systems to maximize performance-per-watt, scalability, reliability, and TCO. Mentor engineers and influence roadmaps through data-driven analysis and stakeholder communication.

Lead the architecture and development of scalable backend services and data pipelines for conversion tracking, attribution, reporting, and campaign optimization. Design reliable conversion workflows, integrations, privacy-aware data handling, schema governance, monitoring, and data-quality systems. Drive technical architecture, operational excellence, testing, and production readiness while mentoring engineers and collaborating with product, data science, privacy, security, reporting, and bidding teams.

Architect and build secure, scalable distributed services for sovereign and commercial cloud environments. Lead architectural decisions involving data residency, compliance, isolation, reliability, and operational excellence. Partner across Microsoft Security, Azure, and sovereign cloud teams to drive integration and technical strategy. Champion engineering standards, mentor senior engineers, and improve developer productivity while overseeing monitoring, incident response, performance, and production operations.

Architect and build CADET’s production system for customer-grounded Copilot evaluations. Own end-to-end architecture spanning customer-signal capture, data enrichment, evaluation generation and execution, quality attribution, reporting, observability, and retention. Develop scalable services and pipelines, establish schemas and data contracts, automate quality gates, implement human-in-the-loop controls, and ensure privacy, security, reliability, reproducibility, and regression protection. Provide principal-level technical leadership across engineering, science, product, and platform teams while mentoring engineers and driving reusable capabilities.

Provides technical leadership for core platform, runtime, SDK, CLI, governance, security, and lifecycle capabilities supporting Power Apps Code Apps and AI-driven application experiences. Designs, implements, optimizes, and debugs scalable services; leads experimentation, reliability, observability, and operational excellence. Partners across Microsoft teams, drives architecture and execution, mentors engineers, establishes standards, and supports production systems as a designated responsible individual.

Design and build large-scale distributed cloud services for AI-driven Windows cloud experiences. Lead system design, code reviews, testing, monitoring, and performance optimization while ensuring security, reliability, and cross-team delivery.

Lead functional validation of PCIe IP at block, cluster, or full-chip levels using UVM/C testbenches and VIP. Develop test plans and unit tests, create and manage regression suites, debug failures, and drive fixes. Improve validation efficiency via methodologies and tools and meet coverage goals toward successful tapeout.

Design, verify, and architect PLL cores for SerDes interface IP. Lead timing analysis, simulation, post-layout verification, low-jitter global clock distribution, and coordinate layout, modeling, and post-silicon validation efforts.

Lead functional verification and validation of complex DPU/SoC designs across pre-silicon and post-silicon stages. Develop UVM/C testbenches, C tests and firmware, define test plans, run regressions, debug failures, create stress/performance scenarios, participate in chip bring-up, and mentor engineers while collaborating with architecture, design, and partner teams.

Leads architecture, development, and operation of secure, high-throughput, multi-tenant cloud services. Sets technical direction for distributed systems, improves reliability and observability, leads live-site incident response, conducts design and code reviews, manages technical risks, collaborates across teams, mentors engineers, and applies AI-first practices to software delivery and operations.

Leads technical strategy and product engineering for RF product families from qualification through production scaling. Oversees hardware, firmware, functional test qualification, yield optimization, reliability, contract manufacturer troubleshooting, NPI, RMA, and production issues. Designs experiments, applies statistical analysis to improve products and processes, mentors senior engineers, and drives cross-functional technical alignment. Requires annual travel to Asia for contract manufacturer engagement.

Lead architecture, development, debugging, validation, and deployment of firmware libraries for Microsoft AI accelerators and cloud silicon. Responsibilities include SoC and IP firmware design, hardware/software co-design, silicon bring-up, root-cause analysis, verification planning, performance optimization, and cross-team technical leadership. The role collaborates across hardware, software, security, validation, and systems teams, drives architecture across multiple silicon generations, establishes engineering practices, and mentors engineers.

Lead architecture, development, debug, and deployment of SoC/accelerator firmware libraries (ANC, compute, DMA). Drive silicon bring-up, firmware frameworks, verification, cross-team integration, and mentor engineers while coordinating with hardware, validation, security, and platform teams.

Lead technical strategy and architecture for Windows Widgets and MSN experiences. Drive design, development, and delivery of large-scale client and platform systems with focus on performance, reliability, experimentation, and cross-organizational collaboration.

Lead the 0-to-1 architecture, development, testing, and launch of Riverside Insights’ Reach platform and next-generation CogAT assessment. Build and manage a 6–10 engineer team, make build-versus-buy decisions, oversee AWS infrastructure and regulated-data compliance, lead customer migration, and translate product roadmaps into technical execution. The role is hands-on, requiring active coding, full-stack fluency, AI-native development, cross-functional partnership, and senior leadership communication.

Senior individual contributor owning technical direction across Perception, Prediction, or Planning for on-vehicle autonomy. Design autonomy architecture, drive robustness, oversee model lifecycle and integration, and convert high-level decisions into production code running at scale on vehicles.

Lead technical strategy and architecture for Developer Experience: build scalable build/test/delivery systems, improve CI/CD throughput, design internal platforms/APIs/SDKs/CLIs, integrate LLM/agentic tooling safely, mentor senior engineers, and drive cross-team initiatives to increase engineering velocity, reliability, and maintainability at organizational scale.

Design and own core browser platform features (DOM, HTML, web APIs) for Microsoft Edge. Drive API design, contribute to Chromium, collaborate with standards bodies, and deliver high-performance, compatible web platform implementations at scale.

Build and scale Xbox growth experiences across console, web, and mobile through full-stack engineering and data-driven experimentation. Responsibilities include proposing product hypotheses, designing A/B tests, implementing telemetry and analytics, shipping reliable services and client features, analyzing results, participating in on-call rotation, using AI-enhanced workflows, mentoring engineers, and driving experiments that improve retention and daily active users.

Lead architecture, design, validation, and troubleshooting of DC-DC power delivery systems for compute, storage, and AI platforms. Drive component qualification, EMI/thermal/reliability testing, supplier and ODM collaboration, root-cause analysis, and mentor junior engineers while influencing product architecture and roadmaps.

Provides technical leadership and architectural ownership for Entra's end-user identity and access experiences. Defines long-term platform strategy, leads cross-organizational AI and modernization initiatives, partners with engineering and product leaders, and drives scalable, secure, resilient, accessible systems. Establishes engineering excellence through architecture, performance, reliability, and operational rigor while mentoring senior engineers and influencing technical direction across the organization.

Develops complex pre- and post-silicon verification environments, tests, models, and coverage for AI accelerator SoCs. Creates verification plans, testbenches, scoreboards, sequences, constraints, assertions, and functional coverage; debugs simulation and emulation failures; develops scalable scripts and Makefiles; and collaborates with architecture, design, firmware, validation, and product engineering teams.