Design and own microarchitecture and RTL for L1 accelerators, translating DSP/FEC algorithms into high-performance SystemVerilog. Deliver end-to-end IP including specification, RTL, synthesis, timing closure, and hand-off. Lead verification, backend/physical design collaboration, and optimize power/area/throughput across major blocks.
Grow with us
Senior RTL Design Engineer - Accelerator IP
Location: Austin, TX (Hybrid; on-site)
Your Next Big Challenge
Join Ericsson's Accelerator IP team in Austin, TX as a Senior RTL Design Engineer and own the microarchitecture of next-generation L1 accelerators from blank page to silicon. If you thrive on translating complex DSP/FEC algorithms into high-performance SystemVerilog, making tough power/area/throughput trade-offs, and delivering end-to-end IP in a lean, high-impact team-this is the role where your work will be seen and felt across world-class telecom products
Step into a role where you're not just another engineer-you're a core architect of breakthrough telecom hardware. At Ericsson's Accelerator IP team, we're designing custom microarchitecture accelerators for EMCA L1 processing that push the boundaries of performance and innovation.
What you'll do:
Here, you'll work in a small, elite team where your ideas shape products used worldwide-and your contributions have a direct line to impact. Forget being siloed: you'll own major blocks end-to-end, from the first spark of concept to the final hand-off.
If you thrive on turning complex algorithms into cutting-edge hardware and enjoy the adrenaline of building something from the ground up, this is your arena.
Transform high-level architectural vision into blazing-fast, reliable RTL (SystemVerilog/Verilog).
Take complete ownership of major IP blocks-specification, microarchitecture, RTL creation, synthesis, and delivery.
Act as the go-to technical lead for verification, backend/PD, and architecture teams.
Drive optimizations to balance power, area, and throughput without compromising innovation.
Lead critical design decisions that steer the next generation of telecom hardware.
What you'll bring
Several years of RTL design in complex ASIC/IP environments.
Expert SystemVerilog/Verilog skills-and a passion for crafting elegant, efficient designs.
End-to-end ASIC flow mastery: coding, linting, CDC, synthesis, timing closure.
Proven ability to distill DSP, FEC, or other L1 processing algorithms into high-performance hardware.
Equally comfortable deep-diving into code and shaping high-level architecture strategies.
A collaborative powerhouse who thrives in an intense, creative, close-knit environment.
You'll be shaping products that power world-class telecom systems in an environment where creativity meets precision. Expect autonomy, impact, and the thrill of seeing your designs come alive in cutting-edge hardware.
Ready to Build the Future?
What happens once you apply?
Click Here to find all you need to know about what our typical hiring process looks like.
Ericsson uses a merit-based hiring approach that values people with different experiences, perspectives and skillsets. We truly believe this approach drives innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity employer, learn more.
If you need assistance or to request an accommodation due to a disability, please contact Ericsson at [email protected].
DISCLAIMER: The above statements are intended to describe the general nature and level of work being performed by employees in this position. They are not an exhaustive list of all responsibilities, duties and skills required for this position, and you may be required to perform additional job tasks as assigned.
Primary country and city: USA || Austin, TX
Job details: Developer
Primary Recruiter: Jim Everett
Compensation and Benefits at Ericsson
At Ericsson, we know that our people are the key to our success. We offer a competitive package to help with your individual needs and goals.
Your Pay
The salary range for this position is dependent on various factors including, but not limited to, location, and the candidate's combination of job-related knowledge, qualifications, skills, education, training, and experience.
The salary range for this position is $117,000 to $175,000
• LOCATION: Texas, USA
Short-Term Variable Compensation Plan (select STV or SIP): Your pay also includes the opportunity for an annual bonus. Actual bonus payouts are based on performance of the business against the unit's objectives, individual performance, and the individual bonus target. Certain eligibility and pro-ration rules apply.
Your Health
Ericsson offers excellent health benefits including the choice of three medical plan options and a dental plan option that allow an employee to select the level of coverage that suits their needs. Employees will receive company credits in an amount equal to the cost that Ericsson pays toward the cost of their medical and dental premiums for themselves and eligible covered dependents.
Your Financial Security
We invest in both your short and long-term financial wellbeing. The Ericsson US 401(k) Plan offers an automatic 3% company contribution and Ericsson match $1 for every $1 you put into the 401(k) Plan on the first 3% of your eligible pay, plus 50 cents on every $1 on the next 2% of eligible pay. When you contribute at least 5% of eligible pay, you are receiving Ericsson's full matching contributions of 4%. Matching and company automatic contributions stop when your total eligible pay for the year reaches the IRS limits. Employees will also receive company credits in an amount equal to the cost of basic life insurance and basic accidental death and dismemberment coverage, as well as short-term and long-term disability coverage. Employees also have the option to participate in Ericsson's Stock Purchase Plan.
Your Time
Your work-life balance is important to us. New employees are provided a minimum of 15 days of accrued vacation, up to 3 personal days per year, 11 annual holidays, 8 hours of volunteer time, and 80 hours of sick time annually. Please note paid time off is pro-rated based on the employee's start date. Furthermore, Ericsson provides up to 16 weeks of paid maternity leave and 6 weeks of parental or adoption leave at 100% of pay.
Additional Benefits
Ericsson offers many other company-paid benefits such as financial wellness programs, educational assistance, matching gifts, and recognition programs.
#BI-Hybrid
Senior RTL Design Engineer - Accelerator IP
Location: Austin, TX (Hybrid; on-site)
Your Next Big Challenge
Join Ericsson's Accelerator IP team in Austin, TX as a Senior RTL Design Engineer and own the microarchitecture of next-generation L1 accelerators from blank page to silicon. If you thrive on translating complex DSP/FEC algorithms into high-performance SystemVerilog, making tough power/area/throughput trade-offs, and delivering end-to-end IP in a lean, high-impact team-this is the role where your work will be seen and felt across world-class telecom products
Step into a role where you're not just another engineer-you're a core architect of breakthrough telecom hardware. At Ericsson's Accelerator IP team, we're designing custom microarchitecture accelerators for EMCA L1 processing that push the boundaries of performance and innovation.
What you'll do:
Here, you'll work in a small, elite team where your ideas shape products used worldwide-and your contributions have a direct line to impact. Forget being siloed: you'll own major blocks end-to-end, from the first spark of concept to the final hand-off.
If you thrive on turning complex algorithms into cutting-edge hardware and enjoy the adrenaline of building something from the ground up, this is your arena.
Transform high-level architectural vision into blazing-fast, reliable RTL (SystemVerilog/Verilog).
Take complete ownership of major IP blocks-specification, microarchitecture, RTL creation, synthesis, and delivery.
Act as the go-to technical lead for verification, backend/PD, and architecture teams.
Drive optimizations to balance power, area, and throughput without compromising innovation.
Lead critical design decisions that steer the next generation of telecom hardware.
What you'll bring
Several years of RTL design in complex ASIC/IP environments.
Expert SystemVerilog/Verilog skills-and a passion for crafting elegant, efficient designs.
End-to-end ASIC flow mastery: coding, linting, CDC, synthesis, timing closure.
Proven ability to distill DSP, FEC, or other L1 processing algorithms into high-performance hardware.
Equally comfortable deep-diving into code and shaping high-level architecture strategies.
A collaborative powerhouse who thrives in an intense, creative, close-knit environment.
You'll be shaping products that power world-class telecom systems in an environment where creativity meets precision. Expect autonomy, impact, and the thrill of seeing your designs come alive in cutting-edge hardware.
Ready to Build the Future?
What happens once you apply?
Click Here to find all you need to know about what our typical hiring process looks like.
Ericsson uses a merit-based hiring approach that values people with different experiences, perspectives and skillsets. We truly believe this approach drives innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity employer, learn more.
If you need assistance or to request an accommodation due to a disability, please contact Ericsson at [email protected].
DISCLAIMER: The above statements are intended to describe the general nature and level of work being performed by employees in this position. They are not an exhaustive list of all responsibilities, duties and skills required for this position, and you may be required to perform additional job tasks as assigned.
Primary country and city: USA || Austin, TX
Job details: Developer
Primary Recruiter: Jim Everett
Compensation and Benefits at Ericsson
At Ericsson, we know that our people are the key to our success. We offer a competitive package to help with your individual needs and goals.
Your Pay
The salary range for this position is dependent on various factors including, but not limited to, location, and the candidate's combination of job-related knowledge, qualifications, skills, education, training, and experience.
The salary range for this position is $117,000 to $175,000
• LOCATION: Texas, USA
Short-Term Variable Compensation Plan (select STV or SIP): Your pay also includes the opportunity for an annual bonus. Actual bonus payouts are based on performance of the business against the unit's objectives, individual performance, and the individual bonus target. Certain eligibility and pro-ration rules apply.
Your Health
Ericsson offers excellent health benefits including the choice of three medical plan options and a dental plan option that allow an employee to select the level of coverage that suits their needs. Employees will receive company credits in an amount equal to the cost that Ericsson pays toward the cost of their medical and dental premiums for themselves and eligible covered dependents.
Your Financial Security
We invest in both your short and long-term financial wellbeing. The Ericsson US 401(k) Plan offers an automatic 3% company contribution and Ericsson match $1 for every $1 you put into the 401(k) Plan on the first 3% of your eligible pay, plus 50 cents on every $1 on the next 2% of eligible pay. When you contribute at least 5% of eligible pay, you are receiving Ericsson's full matching contributions of 4%. Matching and company automatic contributions stop when your total eligible pay for the year reaches the IRS limits. Employees will also receive company credits in an amount equal to the cost of basic life insurance and basic accidental death and dismemberment coverage, as well as short-term and long-term disability coverage. Employees also have the option to participate in Ericsson's Stock Purchase Plan.
Your Time
Your work-life balance is important to us. New employees are provided a minimum of 15 days of accrued vacation, up to 3 personal days per year, 11 annual holidays, 8 hours of volunteer time, and 80 hours of sick time annually. Please note paid time off is pro-rated based on the employee's start date. Furthermore, Ericsson provides up to 16 weeks of paid maternity leave and 6 weeks of parental or adoption leave at 100% of pay.
Additional Benefits
Ericsson offers many other company-paid benefits such as financial wellness programs, educational assistance, matching gifts, and recognition programs.
#BI-Hybrid
Ericsson Bellevue, Washington, USA Office
Ericsson Bellevue Office Office
Factoria’s suburban convenience: shopping, dining, parks, and quick I‑405 access; calm neighborhoods near Seattle’s tech corridor.
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What you need to know about the Seattle Tech Scene
Home to tech titans like Microsoft and Amazon, Seattle punches far above its weight in innovation. But its surrounding mountains, sprinkled with world-famous hiking trails and climbing routes, make the city a destination for outdoorsy types as well. Established as a logging town before shifting to shipbuilding and logistics, the Emerald City is now known for its contributions to aerospace, software, biotech and cloud computing. And its status as a thriving tech ecosystem is attracting out-of-town companies looking to establish new tech and engineering hubs.
Key Facts About Seattle Tech
- Number of Tech Workers: 287,000; 13% of overall workforce (2024 CompTIA survey)
- Major Tech Employers: Amazon, Microsoft, Meta, Google
- Key Industries: Artificial intelligence, cloud computing, software, biotechnology, game development
- Funding Landscape: $3.1 billion in venture capital funding in 2024 (Pitchbook)
- Notable Investors: Madrona, Fuse, Tola, Maveron
- Research Centers and Universities: University of Washington, Seattle University, Seattle Pacific University, Allen Institute for Brain Science, Bill & Melinda Gates Foundation, Seattle Children’s Research Institute

