Top Design Engineer Jobs in Seattle, WA

Design and implement FPGA code for satellite digital payloads, including DSP algorithms, software-defined radio modulation and demodulation, and embedded processor interfaces. Develop custom IP, improve DSP and interface reliability, integrate vendor IP, and support communications architecture and spacecraft design studies. Participate across simulation, synthesis, place and route, timing closure, and hardware testing using Xilinx FPGAs and industry-standard HDL and simulation tools.

Designs and develops hardware test boards and platforms for high-speed electro-optical device characterization in R&D and manufacturing environments. Performs laboratory testing, analog design and debugging, test-system development, hardware bring-up, and firmware development for microcontrollers. Supports System-on-Chip optical engine development and interfaces with vendors. Preferred experience includes power supply design, advanced PCB stack-ups, optical instrumentation, automated measurements, and coherent optical communications.

Leads pre-silicon verification for custom IP and SoC designs, developing test plans, constrained-random tests, scoreboards, checkers, assertions, UVM components, and functional coverage. The role debugs simulation and emulation failures, drives coverage closure, builds verification infrastructure, collaborates across engineering teams, and mentors engineers. It focuses on AI and machine-learning SoCs and requires technical leadership across multiple product cycles.

Leads Design for Manufacturing and Design for Excellence strategies across hardware product development and New Product Introduction programs. Influences product architecture to improve manufacturability, quality, cost, automation, repairability, scalability, and production readiness. Applies mechanical and electro-mechanical engineering, statistical analysis, DOE, FMEA, Six Sigma, tolerance analysis, and process capability methods. Partners with design, quality, reliability, supply chain, suppliers, and global manufacturing teams while mentoring engineers and driving risk reduction through production ramp.

Leads DFM and DFA analysis for complex PCB assemblies, develops manufacturing rule sets, reviews fabrication and assembly data, and collaborates with manufacturing, quality, engineering, and customers. Designs high-density multilayer PCB layouts from schematics using industry-standard CAD tools, creates manufacturing deliverables, maintains libraries and design standards, and supports continuous improvement across a global electronics manufacturing organization.

Develops complex pre- and post-silicon verification environments, tests, models, and coverage for AI accelerator SoCs. Creates verification plans, testbenches, scoreboards, sequences, constraints, assertions, and functional coverage; debugs simulation and emulation failures; develops scalable scripts and Makefiles; and collaborates with architecture, design, firmware, validation, and product engineering teams.

Develop and lead RF, SerDes, and mm-wave integrated circuits from architecture and simulation through silicon validation. Responsibilities include RF and analog IP design, layout guidance, characterization strategy, PCB development, RF and system-level measurements, competitive benchmarking, technology collaboration, productization, and university research liaison activities.

Develop and mature a cryogenic process-design-kit for superconducting quantum hardware. Own model-to-measurement characterization, plan and analyze cryogenic test chips, extend foundry PDKs to low-temperature regimes, partner with foundry and device teams, establish characterization infrastructure, and use EDA/layout/physical-verification toolsets to translate measurements into models, design rules, and documentation for scalable quantum circuit design.

Verifies custom silicon IP and subsystem designs using UVM-based or formal verification environments. Develops test plans, simulations, random stimulus, coverage-based tests, checkers, and debugging workflows to identify defects and achieve coverage signoff. Improves verification methodologies and tools, applies generative AI, and collaborates with partner teams while mentoring others.

Design and develop physical layouts for silicon interposers used in NVIDIA products. Collaborate with package technical leads, signal integrity and technology engineers, and design teams to deliver package solutions. Conduct feasibility studies, floorplanning, custom layout, design-rule and netlist verification, and layout trade-off analysis. Resolve manufacturing, electrical, cost, and scheduling issues while using Cadence tools and verification flows such as DRC and LVS.

Design for Manufacturing Engineer supporting consumer electronics and electromechanical hardware from concept through production. Performs DFM/DFA assessments, tolerance analysis, DOE, FMEA, and statistical evaluations to improve manufacturability, quality, cost, automation, repairability, and scalability. Collaborates with mechanical, electrical, industrial design, reliability, quality, manufacturing, supplier, and factory teams to identify risks, recommend design improvements, and support NPI programs and production ramp.

Lead development and execution of pre-silicon simulation and post-silicon validation plans for quantum SoC and IP. Own verification environments, testbenches, AMS models, bug-tracking, and verification databases; coordinate vendors and contingent staff. Align verification methodology with cross-functional teams and drive release-quality verification to production.

Design and implement RTL for next-generation ASICs used in Starlink space and ground infrastructure. Responsibilities include defining microarchitecture, writing Verilog/SystemVerilog, integrating and verifying designs, supporting synthesis and timing closure, supplying timing constraints, and participating in silicon bring-up and validation. The role requires collaboration with verification, physical implementation, firmware, systems, and product engineering teams.

Design and integrate FPGA and ASIC SoC blocks for Starlink space and ground systems using Verilog and SystemVerilog. Optimize power, performance, and area across the full chip design lifecycle; collaborate on architecture, validation, backend implementation, lab bring-up, and software development. Build analysis and test tools, support DSP and communications subsystem integration, and validate designs in laboratory and on-orbit environments.

Designs and develops custom automation equipment, fixtures, workstations, and electromechanical systems. Creates CAD models, drawings, assemblies, and bills of materials; integrates robotics, vision, servo, pneumatic, and sensing systems. Leads concept development, prototyping, troubleshooting, commissioning, factory acceptance testing, installation, and startup. Resolves mechanical and integration issues, supports machine safety and compliance, and contributes to engineering standards. Requires experience with custom automation machines, motion systems, process tooling, safety design, tolerance analysis, and production equipment deployment.

Lead functional verification and validation of complex DPU/SoC designs across pre-silicon and post-silicon stages. Develop UVM/C testbenches, C tests and firmware, define test plans, run regressions, debug failures, create stress/performance scenarios, participate in chip bring-up, and mentor engineers while collaborating with architecture, design, and partner teams.

Lead Design for Automation (DFA) through new product development, ensuring automation-ready designs. Provide senior manufacturing engineering support for automation, robotics, welding, assembly, tooling, and material handling. Act as SME for automation-critical processes, drive DFA standards and governance, lead PFMEAs and capability reviews, support plant transfers and startups, and apply Lean continuous improvement to reduce cost, risk, and variation.

Design and develop electric motors and electromechanical components for next-generation aircraft. Integrate motor designs with aircraft structures, engines, power electronics, and thermal systems; create CAD models and drawings; support manufacturing documentation; and conduct prototyping, qualification, dyno, aircraft, noise, vibration, and troubleshooting tests.

Owns end-to-end design of new battery packs from concept through production. Responsibilities include optimizing performance, size, weight, manufacturability, and reliability; leading prototyping, testing, qualification, production handoff, requirements definition, drawings, failure analysis, cross-functional architecture execution, design reviews, mentorship, and program leadership.

Lead functional validation of PCIe IP at block, cluster, or full-chip levels using UVM/C testbenches and VIP. Develop test plans and unit tests, create and manage regression suites, debug failures, and drive fixes. Improve validation efficiency via methodologies and tools and meet coverage goals toward successful tapeout.

Designs mechanical and electromechanical test fixtures, tooling, and related hardware for optical networking products. Responsibilities include CAD modeling, engineering drawings, BOMs, configuration-controlled documentation, engineering analysis, tolerance studies, fabrication support, assembly, troubleshooting, validation, and deployment. The role collaborates with engineers, technicians, suppliers, and manufacturing partners to deliver reliable, manufacturable solutions throughout the product development lifecycle.

Lead the architecture and implementation of Amplify’s design system, including reusable React components, design tokens, frontend infrastructure, documentation, and contribution workflows. Partner with Product, Design, and Engineering teams to establish standards, accessibility practices, governance, and adoption across products. Mentor engineers, guide technical decisions, improve development workflows, and explore AI-assisted development practices.

Lead development of pre-silicon and post-silicon verification for SoC/IP, create simulation environments and test plans for digital and analog components, manage repositories and bug tracking, coordinate cross-functional teams (DFT, analog, physical design), and drive verification methodology and automation including AI-assisted workflows and characterization for production release.

Leads block- and subsystem-level pre-silicon verification and post-silicon validation for custom IP and SoCs. Develops verification strategies, test plans, UVM environments, test content, and coverage closure processes; performs silicon bring-up and debugging. Collaborates with architecture, design, firmware, product engineering, program management, and vendors. Provides technical leadership and mentorship while applying AI-based tools to improve verification efficiency.

Lead the architecture, hydraulic design, documentation, integration, manufacturing readiness, controls coordination, and commissioning of liquid-cooling and mechanical distribution systems for modular AI data centers. Own P&IDs, calculations, equipment and valve schedules, interfaces, standards, and performance validation. Collaborate with thermal, electrical, controls, manufacturing, commissioning, supply chain, OEM, and field teams to create scalable, serviceable, repeatable systems for deployment across multiple sites.