Top Senior Hardware Engineer Jobs in Seattle, WA

Lead failure analysis and root-cause corrective actions for networking hardware issues from field and factory sources. Analyze quality metrics, debug complex board- and system-level hardware, review new-product test reports, and drive quality improvements, change management, and multisourcing activities. Collaborate with engineering, manufacturing, operations, customer support, vendors, and customers. Provide technical leadership, document lessons learned, and mentor junior engineers.

Lead the selection, characterization, calibration, qualification, and integration of navigation sensor hardware for launch vehicles and spacecraft. Evaluate accelerometers, gyroscopes, IMUs, and GNSS receivers; define requirements; develop calibration and test methods; oversee environmental qualification and acceptance testing; resolve supplier and hardware issues; and coordinate avionics, manufacturing, RF, and navigation software integration.

Maintains and troubleshoots server, storage, networking, cabling, and power hardware across a large-scale production data center fleet. Writes Python automation scripts, reviews logs and alerts, performs diagnostics, supports deployments, builds hardware health dashboards, coordinates with DevOps, supply chain, and vendors, and assists with hardware evaluation and reliability improvements. Requires on-call availability and travel to data center sites.

Designs and builds hyperscale storage fleet resiliency systems for Azure, including live monitoring, fault detection, prediction, isolation, repair automation, and firmware deployment for SSDs, HDDs, and storage accelerators. The role analyzes fleet data, improves reliability and quality, collaborates with hardware, firmware, software teams and suppliers, and supports Azure service stakeholders.

The Hardware Development Engineer designs and develops high-performance GPS receivers, managing all design phases from concept to production, ensuring compliance with quality and performance standards.

Tests, validates, and troubleshoots next-generation cloud server hardware for performance, power, reliability, and quality. Develops test scripts, documents results, identifies defects, recommends improvements, and resolves hardware issues across engineering and manufacturing environments. Requires hands-on embedded systems debugging, Linux and scripting experience, and knowledge of server architecture, firmware, operating systems, networking, storage, and hardware acceleration technologies.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Develop and own compute and GPU server platforms from architecture through global deployment. Responsibilities include schematic and layout reviews, design for manufacturability, new product introduction, board and system bring-up, validation, debugging, firmware and BIOS feature management, technology qualification, and vendor coordination. The role requires hands-on server architecture, board-level design, Linux and scripting expertise, platform validation, and five-day-per-week presence in the Cambridge office.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Lead on-site technical authority for datacenter hardware reliability and fleet health. Troubleshoot complex hardware failures, drive root cause analysis and corrective actions, coordinate with vendors and cloud providers, establish maintenance standards and runbooks, support new hardware introductions and spare parts strategy, mentor technicians, and analyze failure trends to improve reliability across large-scale GPU and server deployments.

Design and implement a novel AI inference engine through hardware-software co-design. Collaborate with ML, software, and cloud engineers; model PPA trade-offs; contribute to RTL design, simulation, verification, and roadmap planning to optimize inference for modern LLM workloads.

Design and own an automated hardware test rig integrated with CI/CD to build, flash, run, and report tests for a wearable AI device. Implement connectivity and throughput stress tests, long-duration audio and battery/thermal characterization, API-level tests, dashboards with regression flags, diagnostic tooling, and automation-driven bug triage. Establish nightly and weekly runs and partner with firmware to define automated vs. manual coverage.