Top Tech Jobs & Startup Jobs in Seattle, WA

Design and integrate photonic integrated circuits, high-speed modulators, optical I/O, RF interfaces, and rugged space-qualified packages. Lead PIC layout, simulation, tapeout, packaging, bias control, characterization, and radiation, thermal-vacuum, and vibration qualification. Collaborate with systems, RF, ASIC, manufacturing, test, automation, foundry, and packaging teams to develop photonic hardware for satellites and deep-space missions.

Own photonic integrated-circuit design automation, inverse-design and AI-guided optimization, parametric layouts, simulation, DRC/LVS verification, and fabrication-aware modeling. Design and characterize photonic device blocks through tapeout, maintain component libraries and compact models, and connect design tools with automated testing and calibration systems. Develop behavioral and physical models for photonic circuits, links, lasers, and gain media while supporting system co-design, documentation, reviews, and team mentoring.

Design and develop high-performance RF and millimeter-wave MMICs for satellite communications, including power amplifiers, low-noise amplifiers, and RF switches. Own designs from architecture through layout, electromagnetic simulation, tapeout, characterization, and system integration. Optimize performance across power, efficiency, linearity, noise, bandwidth, and robustness while collaborating with RF systems, antenna, packaging, and transceiver teams.

Design and lead advanced ASIC package architectures, especially FC-BGA and MCM solutions, from early trade studies through production. Responsibilities include substrate stack-ups, ball maps, SI/PI, thermal management, signal breakout, material selection, qualification, and assembly optimization. The engineer partners with silicon, RF, and systems teams and manages OSAT and substrate-vendor relationships for high-performance, power-dense mixed-signal and digital SoCs.

Lead end-to-end ASIC package architecture and execution for high-performance FC-BGA and MCM solutions. Define substrate stack-ups, ball maps, SI/PI strategies, thermal architecture, materials, and assembly processes. Partner with silicon, RF, and systems teams to optimize package interfaces, manage OSAT and substrate vendors, establish design standards, and drive qualification through production ramp for high-pin-count, power-dense ASICs.

Lead the architecture, circuit design, integration, verification, tapeout, and silicon validation of high-speed ADCs, DACs, and analog front-ends for advanced mixed-signal SoCs. Drive architecture trade studies, calibration techniques, FinFET CMOS implementation, converter integration, simulation methodologies, and collaboration with RF, digital, systems, package, and verification teams. Provide technical leadership and mentorship to analog and mixed-signal engineers.

Design and implement low-level, real-time embedded software in Rust/C/C++ for satellite subsystems (propulsion, attitude, power). Lead hardware bring-up, debug complex HW/FW issues with JTAG/SWD and scopes, scale software across products, and mentor engineers to ensure fault-tolerant, flight-ready systems.

Build and extend ground software used to build, test, and operate K2 satellites and customer payloads. Collaborate with Mission Operations and Flight Software to design mission architecture; implement backend and frontend features (Rust, TypeScript/Vue); support on-call operations; mentor engineers and participate in design and code reviews to scale mission automation and constellation operations.

Define and execute verification plans for block-to-full-chip, build SystemVerilog/UVM testbenches, write assertions, run constrained-random and directed tests, manage regressions and CI, perform coverage closure and debug, support silicon bring-up and post-silicon validation, and collaborate across architecture, RTL, DFT, firmware, and physical design teams.

Lead full physical design flow for complex SoC blocks and top-level integration—from synthesis through GDSII—achieving timing closure, PPA optimization, sign-off (DRC/LVS, IR/EM, power), automation and scripting, vendor coordination, ECO/tapeout support, and production/spaceflight support for mixed-signal, space-qualified SoCs.