Top Tech Jobs & Startup Jobs in Seattle, WA

Lead security engineering for RTOS, hypervisor, and embedded virtualization: design and review defenses, collaborate on CPU/SoC security, perform threat modeling and automotive TARA, review low-level C/C++ code, build fuzzing and test infrastructure, assess vulnerabilities, and drive security fixes and verification toward automotive safety and security standards.

Design and implement lane-level localization, perception-map association, and lane selection systems using navigation maps. Develop efficient, safe C++ algorithms and productize software to automotive quality and safety standards for deployment in consumer autonomous vehicles. Work with large-scale real and synthetic datasets and collaborate across teams.

Design and implement Rust-to-GPU compiler backends, IR frameworks, and JIT/AOT toolchains. Lower Rust AST/MIR to MLIR/LLVM/PTX, build GPU-specific optimizers, enforce safe parallel abstractions across host/device boundaries, and expose ergonomic device-side primitives. Drive projects from research to production and support profiling, debugging, and benchmarking workflows.

Lead performance and scalability analysis of the Kubernetes-based accelerated runtime stack, design upstream control-plane changes for hyperscale clusters, optimize container startup and inference latency, advance confidential container performance, model large AI-factory deployments with simulations, build at-scale tests and monitoring, and collaborate with researchers and upstream communities to validate and publish results.

Design and implement an MLIR-based AI compiler for GPU inference: develop graph representations and dialects, optimize performance and memory, define APIs, generate kernels, and collaborate with framework and hardware teams to enable new model patterns and GPU features.

Develop and implement compiler optimization algorithms and code generation for deep learning workloads (XLA/OpenXLA) targeting NVIDIA GPUs. Design graph partitioning and tensor sharding for distributed training/inference, performance tune models, work with ML frameworks (JAX) and hardware teams, and contribute to compiler/tooling (MLIR/LLVM/Triton).

Design and implement GPU cluster scheduling and orchestration features, optimize resource usage and performance for large multi-node AI workloads, develop automation and batch workload management, perform performance analysis and root-cause investigations, support users on scheduler issues, and build the GPU-accelerated computing ecosystem.

The role involves defining SoC architecture for low-power platforms, driving PPA trade-off analysis, and collaborating with CPU, GPU, and memory teams. Responsibilities also include engaging with customers and translating their requirements into architectural constraints.

Design and implement an LLVM-based backend JIT compiler for NVIDIA GPUs. Develop compiler passes and optimizations, focusing on high performance and low compile time. Collaborate with hardware, compiler, and application teams to resolve issues and influence future GPU architectures.

Lead design, integration, and delivery of SONiC networking features for NVIDIA products. Develop high-quality C++/Python code in an open-source, continuous-deployment environment, collaborate with internal and external teams, manage chassis/networking features, and engage with the SONiC community to drive next-generation switch solutions.